Minimum qualifications:

• Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.

• Experience with computer architecture concepts, including microarchitecture, cache hierarchy, pipelining, and memory subsystems.

• Experience with physical design flows and Design Verification downstream usage.

Preferred qualifications:

• Master's degree in Electrical Engineering or Computer Science.

• Experience with low power design techniques and methodologies.

• Experience with scripting languages such as Python and Perl.

• Understanding of SoC Architecture, memory hierarchy, coherency, fabric interconnect protocols, clocking, and power management.

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

• Work with Arch, Micro Arch, and RTL design teams on capturing power intent and convergence.

• Review the front-end low power static checks and drive UPF and VCLP convergence and signoff.

• Support RTL and DFT teams on the UPF aspect in incorporating the Physical Design team feedback.

• Work with coss-domains like DFT, DV, and RTL in addressing any UPF/Power intent related methodologies and challenges.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.